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ISL81334, ISL41334
Data Sheet November 21, 2007 FN6202.3
ESD Protected, 5V, Two Port, Dual Protocol (RS-232/RS-485) Transceivers
15kV The ISL81334, ISL41334 are two port interface ICs where each port can be independently configured as a single RS-485, RS-422 transceiver, or as a dual (2 Tx, 2 Rx) RS232 transceiver. With both ports set to the same mode, two RS-485, RS-422 transceivers, or four RS-232 transceivers are available. If either port is in RS-232 mode, the onboard charge pump generates RS-232 compliant 5V Tx output levels from a single VCC supply as low as 4.5V. Four small 0.1F capacitors are required for the charge pump. The transceivers are RS-232 compliant, with the Rx inputs handling up to 25V, and the Tx outputs handling 12V. In RS-485 mode, the transceivers support both the RS-485 and RS-422 differential communication standards. The receivers feature "full failsafe" operation, so the Rx outputs remain in a high state if the inputs are open or shorted together. The transmitters support up to three data rates, two of which are slew rate limited for problem free communications. The charge pump disables when both ports are in RS-485 mode, thereby saving power, minimizing noise, and eliminating the charge pump capacitors. Both RS-232 and RS-485 modes feature loopback and shutdown functions. Loopback internally connects the Tx outputs to the corresponding Rx input, to facilitate board level self test implementation. The outputs remain connected to the loads during loopback, so connection problems (e.g., shorted connectors or cables) can be detected. Shutdown mode disables the Tx and Rx outputs, disables the charge pumps, and places the IC in a low current (A) mode. The ISL41334 is a QFN packaged device that includes two additional user selectable, lower speed and edge rate options for EMI sensitive designs, or to allow longer bus lengths. It also features a logic supply pin (VL) that sets the VOH level of logic outputs, and the switching points of logic inputs, to be compatible with another supply voltage in mixed voltage systems. The QFN also adds active low Rx enable pins to increase design flexibility, allowing Tx/Rx direction control, via a single signal per port, by connecting the corresponding DE and RXEN pins together. For a single port version of these devices, please see the ISL81387, ISL41387 data sheet.
Features
* 15kV (HBM) ESD Protected Bus Pins (RS-232 or RS-485) * Two Independent Ports, Each User Selectable for RS-232 (2 Transceivers) or RS-485, RS-422 (1 Transceiver) * Single 5V (10% Tolerance) Supply * Flow-Through Pinouts Simplify Board Layouts * Pb-Free (RoHS Compliant) * Large (2.7V) Differential VOUT for Improved Noise Immunity in RS-485, RS-422 Networks * Full Failsafe (Open/Short) Rx in RS-485, RS-422 Mode * Loopback Mode Facilitates Board Self Test Functions * User Selectable RS-485 Data Rates (ISL41334 Only) - Fast Speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Mbps - Slew Rate Limited. . . . . . . . . . . . . . . . . . . . . . . 460kbps - Slew Rate Limited. . . . . . . . . . . . . . . . . . . . . . . 115kbps * Fast RS-232 Data Rate . . . . . . . . . . . . . . . Up to 650kbps * Low Current Shutdown Mode. . . . . . . . . . . . . . . . . . .42A * QFN Package Saves Board Space (ISL41334 Only) * Logic Supply Pin (VL) Eases Operation in Mixed Supply Systems (ISL41334 Only)
Applications
* Gaming Applications (e.g., Slot Machines) * Single Board Computers * Factory Automation * Security Networks * Industrial/Process Control Networks * Level Translators (e.g., RS-232 to RS-422) * Point of Sale Equipment * Dual Channel RS-485 Interfaces
TABLE 1. SUMMARY OF FEATURES PART NUMBER ISL81334 ISL41334 NO. OF PORTS 2 2 PACKAGE OPTIONS 28 Ld SOIC, 28 Ld SSOP 40 Ld QFN (6mmx6mm) RS-485 DATA RATE (bps) 20M 20M, 460k, 115k RS-232 DATA RATE (kbps) 650 650 VL PIN? NO YES ACTIVE H or L Rx ENABLE? NONE L LOW POWER SHUTDOWN? YES YES
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2005, 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
ISL81334, ISL41334 Ordering Information
PART NUMBER (Note) ISL81334IAZ ISL81334IAZ-T* ISL81334IBZ ISL81334IBZ-T* ISL41334IRZ ISL41334IRZ-T* PART MARKING 81334 IAZ 81334 IAZ ISL81334IBZ ISL81334IBZ 41334 IRZ 41334 IRZ TEMP. RANGE (C) -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 PACKAGE (Pb-Free) 28 Ld SSOP PKG. DWG. # M28.209
28 Ld SSOP (Tape and Reel) M28.209 28 Ld SOIC 28 Ld SOIC (Tape and Reel) 40 Ld QFN 40 Ld QFN (Tape and Reel) M28.3 M28.3 L40.6x6 L40.6x6
*Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pinouts
ISL81334 (28 LD SOIC, 28 LD SSOP) TOP VIEW
C1+ C1NC NC C1+ 1 C1- 2 V+ 3 A1 4 B1 5 Y1 6 Z1 7 SEL1 8 SEL2 9 Z2 10 Y2 11 B2 12 A2 13 GND 14 28 C2+ 27 C226 VCC 25 RB1 24 RA1 23 DZ1/DE1 22 DY1 21 LB 20 ON/OFF 19 DY2 18 DZ2/DE2 17 RA2 16 RB2 15 VY2 B2 V+ A1 B1 Y1 Z1 SEL1 SEL2 Z2 1 2 3 4 5 6 7 8 9 10 11 A2 12 NC 13 SPA 14 SPB 15 GND 16 GND 17 RXEN1 18 RXEN2 19 V20 NC
FN6202.3 November 21, 2007
ISL41334 (40 LD QFN) TOP VIEW
VCC C2+ C2NC NC 32 VL 31 30 RB1 29 RA1 28 DZ1/DE1 27 DY1 26 LB 25 ON/OFF 24 DY2 23 DZ2/DE2 22 RA2 21 RB2
40
39
38
37
36
35
34
33
2
ISL81334, ISL41334
TABLE 2. ISL81334 FUNCTION TABLE INPUTS SEL1 or 2 0 X 1 1 NOTE: 1. Charge pumps are off iff SEL1 = SEL2 = 1, or if ON/OFF = 0. If ON = 1, and either port is programmed for RS-232 mode, then the charge pumps are on. ON/OFF 1 0 1 1 DE 1 or 2 N.A. X 0 1 RECEIVER OUTPUTS RA ON High-Z ON ON RB ON High-Z High-Z* High-Z* DRIVER OUTPUTS Y ON High-Z High-Z ON Z ON High-Z High-Z ON CHARGE PUMPS (NOTE 1) ON OFF OFF OFF
MODE RS-232 Shutdown RS-485 RS-485
ISL81334 Truth Tables (FOR EACH PORT)
RS-232 TRANSMITTING MODE INPUTS SEL1 or 2 ON/OFF 0 0 0 0 0 1 1 1 1 0 DY 0 0 1 1 X DZ 0 1 0 1 X OUTPUTS Y 1 1 0 0 High-Z Z 1 0 1 0 High-Z
RS-485 TRANSMITTING MODE INPUTS SEL1 or 2 ON/OFF 1 1 1 1 1 1 1 0 DE1 or 2 1 1 0 X DY 0 1 X X OUTPUTS Y 1 0 High-Z High-Z Z 0 1 High-Z High-Z
RS-485 RECEIVING MODE INPUTS OUTPUT B-A -40mV -200mV Open or Shorted together X RA 1 0 1 High-Z RB* High-Z High-Z High-Z High-Z
RS-232 RECEIVING MODE INPUTS SEL1 or 2 ON/OFF 0 0 0 0 0 0 1 1 1 1 1 0 A 0 0 1 1 Open X B 0 1 0 1 Open X OUTPUT RA 1 1 0 0 1 High-Z RB 1 0 1 0 1 High-Z
SEL1 or 2 ON/OFF 1 1 1 1 1 1 1 0
*Internally pulled high through a 40k resistor.
3
FN6202.3 November 21, 2007
ISL81334, ISL41334
TABLE 3. ISL41334 FUNCTION TABLE INPUTS SEL1 or 2 ON/OFF 0 0 X 1 1 1 1 1 1 1 1 1 1 NOTE: 2. Charge pumps are off iff SEL1 = SEL2 = 1, or if ON/OFF = 0. If ON = 1, and either port is programmed for RS-232 mode, then the charge pumps are on. 1 1 0 1 1 1 1 1 1 1 1 1 1 SPA X X X X 0 0 1 1 X 0 0 1 1 SPB X X X X 0 1 0 1 X 0 1 0 1 RXEN 1 or 2 DE 1 or 2 0 1 X 0 0 0 0 0 1 1 1 1 1 N.A. N.A. X 0 1 1 1 1 0 1 1 1 1 RECEIVER OUTPUTS RA ON High-Z High-Z ON ON ON ON ON High-Z High-Z High-Z High-Z High-Z RB ON High-Z High-Z High-Z* High-Z* High-Z* High-Z* High-Z* High-Z* High-Z* High-Z* High-Z* High-Z* DRIVER OUTPUTS Y ON ON High-Z High-Z ON ON ON ON High-Z ON ON ON ON Z ON ON High-Z High-Z ON ON ON ON High-Z ON ON ON ON DRIVER DATA RATE (Mbps) 0.46 0.46 N.A. N.A. 0.46 0.115 20 20 N.A. 0.46 0.115 20 20
CHARGE PUMPS (NOTE 2) ON ON OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF
MODE RS-232 RS-232 Shutdown RS-485 RS-485 RS-485 RS-485 RS-485 RS-485 RS-485 RS-485 RS-485 RS-485
ISL41334 Truth Tables (FOR EACH PORT)
RS-232 TRANSMITTING MODE INPUTS SEL1 or 2 ON/OFF 0 0 0 0 0 1 1 1 1 0 DY 0 0 1 1 X DZ 0 1 0 1 X OUTPUTS Y 1 1 0 0 High-Z Z 1 0 1 0 High-Z
RS-485 TRANSMITTING MODE INPUTS SEL1 ON/ DE or 2 OFF 1 or 2 SPA SPB 1 1 1 1 1 1 1 1 1 0 1 1 1 0 X 0 0 1 X X 0 1 X X X DY 0/1 0/1 0/1 X X OUTPUTS Y 1/0 1/0 1/0 Z 0/1 0/1 0/1 DATA RATE Mbps 0.46 0.115 20 N.A. N.A.
High-Z High-Z High-Z High-Z
RS-232 RECEIVING MODE INPUTS RXEN 1 or 2 SEL1 or 2 ON/OFF 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 1 X A 0 0 1 1 Open X X B 0 1 0 1 Open X X OUTPUT RA 1 1 0 0 1 RB 1 0 1 0 1 1 1 1 0 SEL1 or 2 1 1 1
RS-485 RECEIVING MODE INPUTS ON/OFF 1 1 1 RXEN 1 or 2 0 0 0 1 X B-A -40mV -200mV Open or Shorted together X X OUTPUT RA 1 0 1 RB * High-Z High-Z High-Z
High-Z High-Z High-Z High-Z
High-Z High-Z High-Z High-Z
* Internally pulled high through a 40k resistor.
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FN6202.3 November 21, 2007
ISL81334, ISL41334 Pin Descriptions
PIN GND LB NC ON/OFF RXEN1 RXEN2 SEL VCC VL A MODE BOTH BOTH BOTH BOTH BOTH BOTH BOTH BOTH Ground connection. Enables loopback mode when low. Internally pulled-high. No Connection. If either port is in RS-232 mode, a low on ON/OFF disables the charge pumps. In either mode, a low disables all the outputs, and places the device in low power shutdown. Internally pulled-high. ON = 1 for normal operation. Active low receiver output enable. Rx is enabled when RXEN is low; Rx is high impedance when RXEN is high. Internally pulled low. (QFN only) Interface Mode Select input. High puts corresponding port in RS-485 Mode, while a low puts it in RS-232 Mode. System power supply input (5V). Logic-Level Supply. All TTL/CMOS inputs and outputs are powered by this supply. QFN logic input pins that are externally tied high in the application should use the VL supply for the high voltage level. (QFN only) FUNCTION
RS-232 Receiver input with 15kV ESD protection. A low on A forces RA high; a high on A forces RA low. RS-485 Inverting receiver input with 15kV ESD protection.
B
RS-232 Receiver input with 15kV ESD protection. A low on B forces RB high; a high on B forces RB low. RS-485 Noninverting receiver input with 15kV ESD protection.
DY
RS-232 Driver input. A low on DY forces output Y high. Similarly, a high on DY forces output Y low. RS-485 Driver input. A low on DY forces output Y high and output Z low. Similarly, a high on DY forces output Y low and output Z high.
DZ DE RA
RS-232 Driver input. A low on DZ forces output Z high. Similarly, a high on DZ forces output Z low. RS-485 Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low. Internally pulled high when port selected for RS-485 mode. RS-232 Receiver output. RS-485 Receiver output: If B > A by at least -40mV, RA is high; If B < A by -200mV or more, RA is low; RA = High if A and B are unconnected (floating) or shorted together (i.e., full fail-safe).
RB
RS-232 Receiver output. RS-485 Not used. Internally pulled-high, and unaffected by RXEN.
Y
RS-232 Driver output with 15kV ESD protection. RS-485 Inverting driver output with 15kV ESD protection.
Z
RS-232 Driver output with 15kV ESD protection. RS-485 Noninverting driver output with 15kV ESD protection.
SP C1+ C1C2+ C2V+ V-
RS-485 Speed control. Internally pulled-high. (QFN only) RS-232 External capacitor (voltage doubler) is connected to this lead. Not needed if both ports in RS-485 Mode. RS-232 External capacitor (voltage doubler) is connected to this lead. Not needed if both ports in RS-485 Mode. RS-232 External capacitor (voltage inverter) is connected to this lead. Not needed if both ports in RS-485 Mode. RS-232 External capacitor (voltage inverter) is connected to this lead. Not needed if both ports in RS-485 Mode. RS-232 Internally generated positive RS-232 transmitter supply (+5.5V). C3 not needed if both ports in RS-485 Mode. RS-232 Internally generated negative RS-232 transmitter supply (-5.5V). C4 not needed if both ports in RS-485 Mode.
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FN6202.3 November 21, 2007
ISL81334, ISL41334 Typical Operating Circuit
RS-232 MODE WITHOUT LOOPBACK
+5V + +5V 0.1F 1 + 2 28 + 27 C1+ C1C2+ C226 VCC V+ 3 + C3 0.1F C4 0.1F + RA1 C1 0.1F C2 0.1F + +
RS-232 MODE WITH LOOPBACK
0.1F 1 2 28 + 27 4 5k B1 5 5k LB Rx R 25 C1+ C1C2+ C2R 24 RA1
26 VCC V+ 3 + C3 0.1F C4 0.1F +
C1 0.1F C2 0.1F
V- 15
V- 15
A1
4 5k 5 5k
R
24
A1
B1
R
25
RB1
RB1
Y1
6
D
22
DY1 DZ1 VCC VCC
Y1
6
D
22
DY1 DZ1 GND VCC
Z1
7
D LB
23 21 20
Z1
7
D LB
23 21 20
8
8
SEL1 GND 14
ON/OFF
SEL1 GND 14
ON/OFF
NOTE: PINOUT FOR SOIC AND SSOP SAME FOR PORT 2.
NOTE: PINOUT FOR SOIC AND SSOP SAME FOR PORT 2.
RS-485 MODE WITHOUT LOOPBACK
RS-485 MODE WITH LOOPBACK
+5V
+
+5V 0.1F 1 C1+ C1C2+ C2R 26 VCC V+ 3 + C3 0.1F C4 0.1F + RA1 C1 0.1F C2 0.1F A1 B1
+
0.1F 1 C1+ C1C2+ C2-
26 VCC V+ 3 + C3 0.1F C4 0.1F + RA1
C1 0.1F C2 0.1F
+
+
2 28
2 28
+
27 4 5
V- 15
+
27 4 5
V- 15
A1 B1
24
R
24
25 Y1 Z1 6 22 7 D
RB1 DY1 Y1 Z1 6 7
LB Rx 25 22 D
RB1 DY1
23 VCC VCC 8
DE1 LB SEL1 GND 14 ON/OFF
21 VCC 20 VCC
23 VCC VCC 8
DE1 LB SEL1 GND 14 ON/OFF
21 GND 20 VCC
NOTE: PINOUT FOR SOIC AND SSOP SAME FOR PORT 2.
NOTE: PINOUT FOR SOIC AND SSOP SAME FOR PORT 2.
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FN6202.3 November 21, 2007
ISL81334, ISL41334
Absolute Maximum Ratings (TA = +25C)
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V VL (QFN Only) . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VCC + 0.5V Input Voltages All Except A, B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V Input/Output Voltages A, B (Any Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V to +25V Y, Z (Any Mode, Note 3) . . . . . . . . . . . . . . . . . . . -12.5V to +12.5V RA, RB (non-QFN Package). . . . . . . . . . . . -0.5V to (VCC + 0.5V) RA, RB (QFN Package) . . . . . . . . . . . . . . . . -0.5V to (VL + 0.5V) Output Short Circuit Duration Y, Z, RA, RB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Information
Thermal Resistance
JA (C/W)
28 Ld SOIC Package (Note 5) . . . . . . . . . . . . . . . . . 65 28 Ld SSOP Package (Note 5) . . . . . . . . . . . . . . . . 60 40 Ld QFN Package (Note 4). . . . . . . . . . . . . . . . . . 32 Maximum Junction Temperature (Plastic Package) . . . . . . +150C Maximum Storage Temperature Range . . . . . . . . . .-65C to +150C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40C to +85C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.
NOTES: 3. One output at a time, IOUT 100mA for 10 mins. 4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. See Tech Brief TB379. 5. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1F, VL = VCC (for QFN only); Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25C (Note 6). SYMBOL TEST CONDITIONS TEMP MIN (C) (Note 11) TYP MAX (Note 11) UNITS
PARAMETER
DC CHARACTERISTICS - RS-485 DRIVER (SEL = VCC) Driver Differential VOUT (no load) Driver Differential VOUT (with load) VOD1 VOD2 R = 50 (RS-422) (Figure 1) R = 27 (RS-485) (Figure 1) VOD3 Change in Magnitude of Driver Differential VOUT for Complementary Output States Driver Common-Mode VOUT Change in Magnitude of Driver Common-Mode VOUT for Complementary Output States Driver Short-Circuit Current, VOUT = High or Low Driver Three-State Output Leakage Current (Y, Z) VOD RD = 60, R = 375, VCM = -7V to 12V (Figure 1) R = 27 or 50 (Figure 1) Full Full Full Full Full 2.5 2.2 2 3.1 2.7 2.7 0.01 VCC 5 5 0.2 V V V V V
VOC VOC
R = 27 or 50 (Figure 1) (Note 10) R = 27 or 50 (Figure 1) (Note 10)
Full Full
-
0.01
3.1 0.2
V V
IOS IOZ
-7V (VY or VZ) 12V (Note 8) Outputs Disabled, VCC = 0V or 5.5V VOUT = 12V VOUT = -7V
Full Full Full
35 -200
-
250 500 -
mA A A
DC CHARACTERISTICS - RS-232 DRIVER (SEL = GND) Driver Output Voltage Swing Driver Output Short-Circuit Current VO IOS All TOUTS Loaded with 3k to Ground VOUT = 0V Full Full 5.0 -60 +6/-7 25/-35 60 V mA
DC CHARACTERISTICS - LOGIC PINS (i.e., DRIVER AND CONTROL INPUT PINS) Input High Voltage VIH1 VIH2 VIH3 VL = VCC if QFN VL = 3.3V (QFN Only) VL = 2.5V (QFN Only) Full Full Full 2 2 1.5 1.6 1.2 1 V V V
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FN6202.3 November 21, 2007
ISL81334, ISL41334
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1F, VL = VCC (for QFN only); Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25C (Note 6). (Continued) SYMBOL VIL1 VIL2 VIL3 Input Current IIN1 IIN2 TEST CONDITIONS VL = VCC if QFN VL = 3.3V (QFN Only) VL = 2.5V (QFN Only) Pins Without Pull-ups or Pull-downs LB, ON/OFF, DE, SP (QFN), RXEN (QFN) TEMP MIN (C) (Note 11) Full Full Full Full Full -2 -25 TYP 1.4 1 MAX (Note 11) UNITS 0.8 0.7 0.5 2 25 V V V A A
PARAMETER Input Low Voltage
DC CHARACTERISTICS - RS-485 RECEIVER INPUTS (SEL = VCC) Receiver Differential Threshold Voltage Receiver Input Hysteresis Receiver Input Current (A, B) VTH VTH IIN -7V VCM 12V, Full Failsafe VCM = 0V VCC = 0V or 4.5 to 5.5V VIN = 12V VIN = -7V Receiver Input Resistance RIN -7V VCM 12V, VCC = 0 (Note 9) or 4.5V VCC 5.5V Full 25 Full Full Full -0.2 -0.64 15 35 -0.04 0.8 V mV mA mA k
DC CHARACTERISTICS - RS-232 RECEIVER INPUTS (SEL = GND) Receiver Input Voltage Range Receiver Input Threshold VIN VIL VIH Receiver Input Hysteresis Receiver Input Resistance VTH RIN VIN = 15V, VCC Powered Up (Note 9) Full Full Full 25 Full -25 2.4 3 1.4 1.9 0.5 5 25 0.8 7 V V V V k
DC CHARACTERISTICS - RECEIVER OUTPUTS (485 OR 232 MODE) Receiver Output High Voltage VOH1 VOH2 VOH3 Receiver Output Low Voltage Receiver Short-Circuit Current Receiver Three-State Output Current Unused Receiver (RB) Pull-Up Resistance VOL IOSR IOZR ROBZ IO = -2mA (VL = VCC if QFN) IO = -650A, VL = 3V (QFN Only) IO = -500A, VL = 2.5V (QFN Only) IO = 3mA 0V VO VCC Output Disabled, 0V VO VCC (or VL for QFN) ON/OFF = VCC, SELX = VCC (RS-485 Mode) Full Full Full Full Full Full 25 3.5 2.6 2 7 4.6 2.9 2.4 0.1 40 0.4 85 10 V V V V mA A k
POWER SUPPLY CHARACTERISTICS No-Load Supply Current (Note 7) ICC232 ICC485 Shutdown Supply Current SEL1 or SEL2 = GND, LB = ON/OFF = VCC SEL 1 and 2 = LB = DE = ON/OFF = VCC Full Full Full Full Full 3.7 1.6 25 42 80 7 5 50 80 160 mA mA A A A
ISHDN232 ON/OFF = SELX = GND, LB = VCC, (SPX = VCC if QFN) ISHDN485 ON/OFF = DEX = GND, SELX = LB = VCC, (SPX = GND if QFN) SOIC/SSOP QFN
ESD CHARACTERISTICS Bus Pins (A, B, Y, Z) Any Mode All Other Pins Human Body Model Human Body Model 25 25 15 4 kV kV
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FN6202.3 November 21, 2007
ISL81334, ISL41334
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1F, VL = VCC (for QFN only); Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25C (Note 6). (Continued) SYMBOL TEST CONDITIONS TEMP MIN (C) (Note 11) TYP MAX (Note 11) UNITS
PARAMETER
RS-232 DRIVER AND RECEIVER SWITCHING CHARACTERISTICS (SEL = GND, ALL VERSIONS AND SPEEDS) Driver Output Transition Region Slew Rate Driver Output Transition Time Driver Propagation Delay SR RL = 3k, Measured From 3V to -3V or -3V to 3V CL 15pF CL 2500pF Full Full Full Full Full tDPHL - tDPLH (Figure 6) VOUT = 3.0V RL = 3k, CL = 1000pF, One Transmitter Switching per port CL = 15pF (Figure 7) Full 25 Full Full Full tRPHL - tRPLH (Figure 7) CL = 15pF Full Full 4 0.22 460 0.46 18 12 1.2 1 1.2 240 20 650 50 40 10 2 30 3.1 2 2 400 120 120 40 V/s V/s s s s ns s kbps ns ns ns Mbps
tr, tf tDPHL tDPLH
RL = 3k, CL = 2500pF, 10% to 90% RL = 3k, CL = 1000pF (Figure 6)
Driver Propagation Delay Skew Driver Enable Time from Shutdown Driver Maximum Data Rate Receiver Propagation Delay
tDSKEW tDENSD DRD tRPHL tRPLH
Receiver Propagation Delay Skew Receiver Maximum Data Rate
tRSKEW DRR
RS-485 DRIVER SWITCHING CHARACTERISTICS (FAST DATA RATE (20Mbps), SEL = VCC, ALL VERSIONS (SPA = VCC if QFN)) Driver Differential Input to Output Delay Driver Output Skew Driver Differential Rise or Fall Time Driver Enable to Output Low Driver Enable to Output High Driver Disable from Output Low Driver Disable from Output High Driver Enable from Shutdown to Output Low Driver Enable from Shutdown to Output High Driver Maximum Data Rate tDLH, tDHL tSKEW tR, tF tZL tZH tLZ tHZ RDIFF = 54, CL = 100pF (Figure 2) RDIFF = 54, CL = 100pF (Figure 2) RDIFF = 54, CL = 100pF (Figure 2) CL = 100pF, SW = VCC (Figure 3) CL = 100pF, SW = GND (Figure 3) CL = 15pF, SW = VCC (Figure 3) CL = 15pF, SW = GND (Figure 3) Full Full Full Full Full Full Full Full Full Full 15 3 30 3 11 27 24 31 24 65 152 30 50 10 20 60 60 60 60 250 250 ns ns ns ns ns ns ns ns ns Mbps
tZL(SHDN) RL = 500, CL = 100pF, SW = VCC (Figure 3) tZH(SHDN) RL = 500, CL = 100pF, SW = GND (Figure 3) fMAX RDIFF = 54, CL = 100pF (Figure 2)
RS-485 DRIVER SWITCHING CHARACTERISTICS (MEDIUM DATA RATE (460kbps, QFN ONLY), SEL = VCC, SPA = SPB = GND) Driver Differential Input to Output Delay Driver Output Skew Driver Differential Rise or Fall Time Driver Enable to Output Low Driver Enable to Output High Driver Disable from Output Low Driver Disable from Output High Driver Enable from Shutdown to Output Low Driver Enable from Shutdown to Output High tDLH, tDHL tSKEW tR, tF tZL tZH tLZ tHZ RDIFF = 54, CL = 100pF (Figure 2) RDIFF = 54, CL = 100pF (Figure 2) RDIFF = 54, CL = 100pF (Figure 2) CL = 100pF, SW = VCC (Figure 3) CL = 100pF, SW = GND (Figure 3) CL = 15pF, SW = VCC (Figure 3) CL = 15pF, SW = GND (Figure 3) Full Full Full Full Full Full Full Full Full 200 300 490 110 600 30 128 31 24 65 255 1000 400 1100 300 300 60 60 500 500 ns ns ns ns ns ns ns ns ns
tZL(SHDN) RL = 500, CL = 100pF, SW = VCC (Figure 3) tZH(SHDN) RL = 500, CL = 100pF, SW = GND (Figure 3)
9
FN6202.3 November 21, 2007
ISL81334, ISL41334
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1F, VL = VCC (for QFN only); Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25C (Note 6). (Continued) SYMBOL fMAX TEST CONDITIONS RDIFF = 54, CL = 100pF (Figure 2) TEMP MIN (C) (Note 11) Full TYP 2000 MAX (Note 11) UNITS kbps
PARAMETER Driver Maximum Data Rate
RS-485 DRIVER SWITCHING CHARACTERISTICS (SLOW DATA RATE (115kbps, QFN ONLY), SEL = VCC, SPA = GND, SPB = VCC) Driver Differential Input to Output Delay Driver Output Skew Driver Differential Rise or Fall Time Driver Enable to Output Low Driver Enable to Output High Driver Disable from Output Low Driver Disable from Output High Driver Enable from Shutdown to Output Low Driver Enable from Shutdown to Output High Driver Maximum Data Rate tDLH, tDHL tSKEW tR, tF tZL tZH tLZ tHZ RDIFF = 54, CL = 100pF (Figure 2) RDIFF = 54, CL = 100pF (Figure 2) RDIFF = 54, CL = 100pF (Figure 2) CL = 100pF, SW = VCC (Figure 3) CL = 100pF, SW = GND (Figure 3) CL = 15pF, SW = VCC (Figure 3) CL = 15pF, SW = GND (Figure 3) Full Full Full Full Full Full Full Full Full Full 800 1000 1500 350 2000 32 300 31 24 65 420 800 2500 1250 3100 600 600 60 60 800 800 ns ns ns ns ns ns ns ns ns kbps
tZL(SHDN) RL = 500, CL = 100pF, SW = VCC (Figure 3) tZH(SHDN) RL = 500, CL = 100pF, SW = GND (Figure 3) fMAX RDIFF = 54, CL = 100pF (Figure 2)
RS-485 RECEIVER SWITCHING CHARACTERISTICS (SEL = VCC, ALL VERSIONS AND SPEEDS) Receiver Input to Output Delay Receiver Skew | tPLH - tPHL | Receiver Maximum Data Rate tPLH, tPHL (Figure 4) tSKEW fMAX (Figure 4) Full Full Full 20 50 0.1 40 90 10 ns ns Mbps
RECEIVER ENABLE/DISABLE CHARACTERISTICS (ALL MODES AND SPEEDS) Receiver Enable to Output Low Receiver Enable to Output High Receiver Disable from Output Low Receiver Disable from Output High Receiver Enable from Shutdown to Output Low Receiver Enable from Shutdown to Output High NOTES: 6. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 7. Supply current specification is valid for loaded drivers when DE = 0V (RS-485 mode only). 8. Applies to peak current. See "Typical Performance Curves" starting on page 19 for more information. 9. RIN defaults to RS-485 mode (>15k) when the device is unpowered (VCC = 0V), or in SHDN, regardless of the state of the SEL inputs. 10. VCC 5.25V. 11. Parts are 100% tested at +25C. Over-temperature limits established by characterization and are not production tested. tZL tZH tLZ tHZ tZLSHDN QFN Only, CL = 15pF, SW = VCC (Figure 5) QFN Only, CL = 15pF, SW = GND (Figure 5) QFN Only, CL = 15pF, SW = VCC (Figure 5) QFN Only, CL = 15pF, SW = GND (Figure 5) CL = 15pF, SW = VCC (Figure 5) RS-485 Mode RS-232 Mode tZHSHDN CL = 15pF, SW = GND (Figure 5) RS-485 Mode RS-232 Mode Full Full Full Full Full 25 Full 25 22 23 24 25 260 35 260 25 60 60 60 60 700 700 ns ns ns ns ns ns ns ns
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FN6202.3 November 21, 2007
ISL81334, ISL41334 Test Circuits and Waveforms
R VCC DE DY Y D Z R VOC RD VOD
FIGURE 1. RS-485 DRIVER VOD AND VOC TEST CIRCUIT
3V DY 1.5V 1.5V 0V tPLH OUT (Z) 50% tPHL VOH 50% VOL tPHL CL = 100pF Y D Z SIGNAL GENERATOR RDIFF CL = 100pF DIFF OUT (Z - Y) tR SKEW = |tPLH (Y or Z) - tPHL (Z or Y)| OUT (Y) tDLH 90% 10% 0V 50% tDHL 0V 90% 10% tF +VOD -VOD tPLH VOH 50% VOL
VCC
DE DY
FIGURE 2A. TEST CIRCUIT
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2. RS-485 DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
11
FN6202.3 November 21, 2007
ISL81334, ISL41334 Test Circuits and Waveforms (Continued)
DE DY SIGNAL GENERATOR Y D Z CL tZH(SHDN) FOR SHDN TESTS, SWITCH ON/OFF RATHER THAN DE OUT (Y, Z) tZH OUTPUT HIGH 2.3V tHZ VOH - 0.5V VOH 0V tZL tZL(SHDN) OUT (Y, Z) 2.3V OUTPUT LOW tLZ VCC VOL + 0.5V V OL 500 SW VCC GND ENABLED DE (ON/OFF FOR SHDN) 1.5V 1.5V 0V 3V
PARAMETER tHZ tLZ tZH tZL tZH(SHDN) tZL(SHDN)
ON/DE 1/1/1/1/-/1 -/1
OUTPUT Y/Z Y/Z Y/Z Y/Z Y/Z Y/Z
DY 0/1 1/0 0/1 1/0 0/1 1/0
SW GND VCC GND VCC GND VCC
CL (pF) 15 15 100 100 100 100 FIGURE 3B. MEASUREMENT POINTS
FIGURE 3A. TEST CIRCUIT
FIGURE 3. RS-485 DRIVER ENABLE AND DISABLE TIMES
RXEN (QFN ONLY) 0V A B R 15pF RA
+1.5V B 0V tPLH 0V -1.5V tPHL VCC
SIGNAL GENERATOR
RA
1.5V
1.5V
0V
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. RS-485 RECEIVER PROPAGATION DELAY
RXEN (QFN ONLY) A R SIGNAL GENERATOR B RA 1k SW 15pF VCC GND
ON/OFF (FOR SHDN TESTS)
3V 1.5V ENABLED 0V 3V 1.5V 0V
RXEN (QFN ONLY)
1.5V
FOR SHDN TESTS, SWITCH ON/OFF RATHER THAN RXEN
tZH(SHDN)
tZH RA
OUTPUT HIGH 1.5V
tHZ VOH - 0.5V VOH 0V
PARAMETER tHZ (QFN Only) tLZ (QFN Only) tZH (QFN Only) tZL (QFN Only) tZH(SHDN) tZL(SHDN)
ON/RXEN 1/1/1/1/-/0 -/0
B +1.5V -1.5V +1.5V -1.5V +1.5V -1.5V
SW GND VCC GND VCC GND VCC
tZL tZL(SHDN) RA 1.5V
tLZ VCC VOL + 0.5V V
OL
OUTPUT LOW
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RS-485 RECEIVER ENABLE AND DISABLE TIMES
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ISL81334, ISL41334 Test Circuits and Waveforms (Continued)
3V DY,Z DY,Z D Y, Z CL tDPHL RL OUT (Y,Z) SKEW = |tDPHL - tDPLH| 0V 0V VO1.5V 1.5V 0V tDPLH VO+
SIGNAL GENERATOR
FIGURE 6A. TEST CIRCUIT
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. RS-232 DRIVER PROPAGATION DELAY AND TRANSITION TIMES
RXEN (QFN ONLY) A, B RA, RB CL = 15pF
3V A, B 1.3V 1.7V 0V tRPHL RA, RB SKEW = |tRPHL - tRPLH| tRPLH 2.4V 0.8V VOH VOL
R
SIGNAL GENERATOR
FIGURE 7A. TEST CIRCUIT
FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. RS-232 RECEIVER PROPAGATION DELAY AND TRANSITION TIMES
Typical Application
RS-232 to RS-485 Converter
The ISL81334, ISL41334 are ideal for implementing a single IC 2-wire (Tx Data, Rx Data) protocol converter, because each port can be programmed for a different protocol. Figure 8 illustrates the simple connections to create a single transceiver RS-232 to RS-485 converter. Depending on the RS-232 data rate, using an RS-422 bus as an RS-232 "extension cord" can extend the transmission distance up to 4000' (1220m). A similar circuit on the other end of the cable completes the conversion to/from RS-232.
+5V C1 0.1F C2 0.1F
+ 0.1F 1 + C1+ 2 C128 C2+ + 27 C24 A1 5k
26 VCC V+ 3 +C3 0.1F C4 0.1F + NC
V- 15 R R RA1 24 RB1 25
NC TxD RS-232 IN
5 B1 5k
NC RxD RS-232 OUT
6 Y1 7 Z1 8 SEL1 SEL2
D D
DY1 22 DZ1 23
Detailed Description
Each of the two ISL81334, ISL41334 ports supports dual protocols: RS-485/422, and RS-232. RS-485 and RS-422 are differential (balanced) data transmission standards for use in high speed (up to 20Mbps) networks, or long haul and noisy environments. The differential signaling, coupled with RS-485's requirement for extended common mode range (CMR) of +12V to -7V make these transceivers extremely tolerant of ground potential differences, as well as voltages induced in the cable by external fields. Both of these effects are real concerns when communicating over the RS-485, RS-422 maximum distance of 4000' (1220m). It is important to note that the ISL81334, ISL41334 don't follow the RS-485 convention whereby the inverting I/O is labeled "B/Z", and the noninverting I/O is "A/Y". Thus, in the application diagrams below the 1334 A/Y (B/Z) pins connect to the B/Z (A/Y) pins of the generic RS-485, RS-422 ICs. 13
VCC
9
ON/OFF
20
VCC
13 A2 RS-485 IN 12 B2 11 RS-485 OUT 10 Y2 Z2 D R
RA2 17
DY2 19 DE2 18
VCC
GND 14 NOTE: PINOUT FOR SOIC AND SSOP
FIGURE 8. SINGLE IC RS-232 TO RS-485 CONVERTER
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ISL81334, ISL41334
RS-422 is typically a point-to-point (one driver talking to one receiver on a bus), or a point-to-multipoint (multidrop) standard that allows only one driver and up to 10 receivers on each bus. Because of the one driver per bus limitation, RS-422 networks use a two bus, full duplex structure for bidirectional communication, and the Rx inputs and Tx outputs (no tri-state required) connect to different busses, as shown in Figure 10. Conversely, RS-485 is a true multipoint standard, which allows up to 32 devices (any combination of drivers- must be tri-statable - and receivers) on each bus. Now bidirectional communication takes place on a single bus, so the Rx inputs and Tx outputs of a port connect to the same bus lines, as shown in Figure 9. Each port set to RS-485 /422 mode includes one Rx and one Tx. RS-232 is a point-to-point, singled ended (signal voltages referenced to GND) communication protocol targeting fairly short (<150', 46m) and low data rate (<1Mbps) applications. Each port contains two transceivers (2 Tx and 2 Rx) in RS-232 mode. Protocol selection is handled via a logic pin (SELX) for each port.
.
ISL81334, ISL41334 Advantages
These dual protocol ICs offer many parametric improvements versus those offered on competing dual protocol devices. Some of the major improvements are: * 15kV Bus Pin ESD - Eases board level requirements * 2.7V Diff VOUT - Better Noise immunity and/or distance * Full Failsafe RS-485 Rx - Eliminates bus biasing * Selectable RS-485 Data Rate - Up to 20Mbps, or slewrate limited for low EMI and fewer termination issues * High RS-232 Data Rate - >460kbps * Lower Tx and Rx Skews - Wider, consistent bit widths * Lower ICC - Max ICC is 2x to 4x lower than competition * Flow-Thru Pinouts - Tx, Rx bus pins on one side/logic pins on the other, for easy routing to connector/UART * Smaller (SSOP and QFN) and Pb-free Packaging.
GENERIC 1/2 DUPLEX 485 XCVR RO RE DE DI D GND B/Z A/Y Y D Z GND B/Z A/Y RT RT GND D + GENERIC 1/2 DUPLEX 485 XCVR +5V + 0.1F
+5V ISL81334, ISL41334 VCC RA RXEN * Tx/Rx DE DY R B A + 0.1F
0.1F R +5V VCC
VCC R RO RE DE DI
* QFN ONLY
FIGURE 9. TYPICAL HALF DUPLEX RS-485 NETWORK
GENERIC 422 Rx (SLAVE) RO RE GENERIC FULL DUPLEX 422 XCVR (SLAVE) +5V R 0.1F +5V VCC GND B A RT A B RT Z Y GND D DI 0.1F + + +5V ISL81334, ISL41334 (MASTER) 1k OR NC DY DE D VCC Z Y A RA R B GND + 0.1F
VCC R RO
FIGURE 10. TYPICAL RS-422 NETWORK
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RS-232 Mode
RX FEATURES RS-232 receivers invert and convert RS-232 input levels (3V to 25V) to the standard TTL/CMOS levels required by a UART, ASIC, or controller serial port. Receivers are designed to operate at faster data rates than the drivers, and they feature very low skews (10ns) so the receivers contribute negligibly to bit width distortion. Inputs include the standards required 3k to 7k pulldown resistor, so unused inputs may be left unconnected. Rx inputs also have built-in hysteresis to increase noise immunity, and to decrease erroneous triggering due to slowly transitioning input signals. Rx outputs are short circuit protected, and are only tri-statable when the entire IC is shutdown via the ON/OFF pin, or via the active low RXEN pin available on the QFN package option (see "ISL41334 (QFN Package) Special Features" on page 17 for more details). TX FEATURES RS-232 drivers invert and convert the standard TTL/CMOS levels from a UART, or controller serial port to RS-232 compliant levels (5V minimum). The Tx delivers these compliant output levels even at data rates of 650kbps, and with loads of 1000pF. The drivers are designed for low skew (typically 12% of the 500kbps bit width), and are compliant to the RS-232 slew rate specification (4V/s to 30V/s) for a wide range of load capacitances. Tx inputs float if left unconnected, and may cause ICC increases. For the best results, connect unused inputs to GND. Tx outputs are short circuit protected, and incorporate a thermal SHDN feature to protect the IC in situations of severe power dissipation. See the RS-485 section for more details. Drivers tri-state only in SHDN, or when the 5V power supply is off. The SHDN function is useful for tri-stating the outputs if both ports will always be tri-stated together (e.g., used as a four transceiver RS-232 port), and if it is acceptable for the Rx to be disabled as well. A single port Tx disable can be accomplished by switching the port to RS-485 mode, and then using the corresponding DE pin to tri-state the drivers. Of course, the Rx is now an RS-485 Rx, so this option is feasible only if the Rx aren't needed when the Tx are disabled. CHARGE PUMPS The on-chip charge pumps create the RS-232 transmitter power supplies (typically +6/-7V) from a single supply as low as 4.5V, and are enabled only if either port is configured for RS-232 operation. The efficient design requires only four small 0.1F capacitors for the voltage doubler and inverter functions. By operating discontinuously (i.e., turning off as soon as V+ and V- pump up to the nominal values), the charge pump contribution to RS-232 mode ICC is reduced significantly. Unlike competing devices that require the charge pump in RS-485 mode, disabling the charge pump saves power, and minimizes noise. If the application keeps 15 both ports in RS-485 mode (e.g., a dedicated dual channel RS-485 interface), then the charge pump capacitors aren't even required. DATA RATES AND CABLING Drivers operate at data rates of up to 650kbps, and are guaranteed for data rates of up to 460kbps. The charge pumps and drivers are designed such that one driver in each port can be operated at the rated load, and at 460kbps (see Figure 34). Figure 34 also shows that drivers can easily drive several thousands of picofarads at data rates up to 250kbps, while still delivering compliant 5V output levels. Receivers operate at data rates up to 2Mbps. They are designed for a higher data rate to facilitate faster factory downloading of software into the final product, thereby improving the user's manufacturing throughput. Figures 37 and 38 illustrate driver and receiver waveforms at 250kbps, and 500kbps, respectively. For these graphs, one driver of each port drives the specified capacitive load, and a receiver in the port. RS-232 doesn't require anything special for cabling; just a single bus wire per transmitter and receiver, and another wire for GND. So an ISL81334, ISL41334 RS-232 port uses a five conductor cable for interconnection. Bus terminations are not required, nor allowed, by the RS-232 standard.
RS-485 Mode
RX FEATURES RS-485 receivers convert differential input signals as small as 200mV, as required by the RS-485 and RS-422 standards, to TTL/CMOS output levels. The differential Rx provides maximum sensitivity, noise immunity, and common mode rejection. Per the RS-485 standard, receiver inputs function with common mode voltages as great as 7V outside the power supplies (i.e., +12V and -7V), making them ideal for long networks where induced voltages are a realistic concern. Each RS-485, RS-422 port includes a single receiver (RA), and the unused Rx output (RB) is disabled, but pulled high by an internal current source. The internal current source turns off in SHDN. Worst case receiver input currents are 20% lower than the 1 "unit load" (1mA) RS-485 limit, which translates to a 15k minimum input resistance. These receivers include a "full fail-safe" function that guarantees a high level receiver output if the receiver inputs are unconnected (floating), shorted together, or if the bus is terminated but undriven (i.e., differential voltage collapses to near zero due to termination). Failsafe with shorted, or terminated and undriven inputs is accomplished by setting the Rx upper switching point at -40mV, thereby ensuring that the Rx recognizes a 0V differential as a high level. All the Rx outputs are short circuit protected, and are tri-state when the IC is forced into SHDN, but ISL81334 (SOIC and
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ISL81334, ISL41334
SSOP) receiver outputs are not independently tri-statable. ISL41334 (QFN) receiver outputs are tri-statable via an active low RXEN input for each port (see "ISL41334 (QFN Package) Special Features" on page 17 for more details). TX FEATURES The RS-485, RS-422 driver is a differential output device that delivers at least 2.2V across a 54 load (RS-485), and at least 2.5V across a 100 load (RS-422). Both levels significantly exceed the standards requirements, and these exceptional output voltages increase system noise immunity, and/or allow for transmission over longer distances. The drivers feature low propagation delay skew to maximize bit widths, and to minimize EMI. To allow multiple drivers on a bus, the RS-485 spec requires that drivers survive worst case bus contentions undamaged. The ISL81334, ISL41334 drivers meet this requirement via driver output short circuit current limits, and on-chip thermal shutdown circuitry. The output stages incorporate current limiting circuitry that ensures that the output current never exceeds the RS-485 specification, even at the common mode voltage range extremes. In the event of a major short circuit condition, devices also include a thermal shutdown feature that disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers automatically re-enable after the die temperature drops about 15. If the contention persists, the thermal shutdown/re-enable cycle repeats until the fault is cleared. Receivers stay operational during thermal shutdown. RS-485 multi-driver operation also requires drivers to include tri-state functionality, so each port has a DE pin to control this function. If the driver is used in an RS-422 network, such that driver tri-state isn't required, then the DE pin can be left unconnected and an internal pull-up keeps it in the enabled state. Drivers are also tri-stated when the IC is in SHDN, or when the 5V power supply is off. SPEED OPTIONS The ISL81334 (SOIC, SSOP) has fixed, high slew rate driver outputs optimized for 20Mbps data rates. The ISL41334 (QFN) offers three user selectable data rate options: "Fast" for high slew rate and 20Mbps; "Medium" with slew rate limiting set for 460kbps; "Slow" with even more slew rate limiting for 115kbps operation. See "Data Rate, Cables, and Terminations" on page 16 and "RS-485 Slew Rate Limited Data Rates" on page 19 for more information. Receiver performance is the same for all three speed options. DATA RATE, CABLES, AND TERMINATIONS RS-485, RS-422 are intended for network lengths up to 4000' (1220m), but the maximum system data rate decreases as the transmission length increases. Devices operating at the maximum data rate of 20Mbps are limited to lengths of 20' to 30' (6m to 9m), while devices operating at or below 115kbps can operate at the maximum length of 4000' (1220m). Higher data rates require faster edges, so both the ISL81334, ISL41334 versions offer an edge rate capable of 20Mbps data rates. The ISL41334 also offers two slew rate limited edge rates to minimize problems at slower data rates. Nevertheless, for the best jitter performance when driving long cables, the faster speed settings may be preferable, even at low data rates. See "RS-485 Slew Rate Limited Data Rates" on page 19 for details. Twisted pair is the cable of choice for RS-485, RS-422 networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receivers in these ICs. The preferred cable connection technique is "daisy-chaining", where the cable runs from the connector of one device directly to the connector of the next device, such that cable stub lengths are negligible. A "backbone" structure, where stubs run from the main backbone cable to each device's connector, is the next best choice, but care must be taken to ensure that each stub is electrically "short". See Table 4 for recommended maximum stub lengths for each speed option.
TABLE 4. RECOMMENDED STUB LENGTHS SPEED OPTION SLOW MED FAST MAXIMUM STUB LENGTH ft (m) 350 to 500 (107 to 152) 100 to 150 (30.5 to 46) 1 to 3 (0.3 to 0.9)
Proper termination is imperative to minimize reflections when using the 20Mbps speed option. Short networks using the medium and slow speed options need not be terminated, but terminations are recommended unless power dissipation is an overriding concern. Note that the RS-485 specification allows a maximum of two terminations on a network, otherwise the Tx output voltage may not meet the required VOD. In point-to-point, or point-to-multipoint (RS-422) networks, the main cable should be terminated in its characteristic impedance (typically 120) at the end farthest from the driver. In multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible, but definitely shorter than the limits shown in Table 4. Multipoint (RS-485) systems require that the main cable be terminated in its characteristic impedance at both ends. Again, keep stubs connecting a transceiver to the main cable as short as possible, and refer to Table 4. Avoid "star", and other configurations, where there are many "ends" which would require more than the two allowed terminations to prevent reflections.
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High ESD
All pins on the ISL81334, ISL41334 include ESD protection structures rated at 4kV (HBM), which is good enough to survive ESD events commonly seen during manufacturing. But the bus pins (Tx outputs and Rx inputs) are particularly vulnerable to ESD events because they connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can destroy an unprotected port. ISL81334, ISL41334 bus pins are fitted with advanced structures that deliver ESD protection in excess of 15kV (HBM), without interfering with any signal in the RS-485 or the RS-232 range. This high level of protection may eliminate the need for board level protection, or at the very least will increase the robustness of any board level scheme. All but 5A of SHDN ICC current is due to control input (ON, LB, SP, DE) pull-up resistors (~20A/resistor), so SHDN ICC varies depending on the ISL81334, ISL41334 configuration. The specification tables indicate the worst case values, but careful selection of the configuration yields lower currents. For example, in RS-232 mode the SP pins aren't used, so if both ports are configured for RS-232, floating or tying the SP pins high minimizes SHDN ICC. Likewise in RS-485 mode, the drivers are disabled in SHDN, so driving the DE pins high during this time also reduces ICC. On the ISL41334, the SHDN ICC increases as VL decreases. VL powers the input stage and sets its VOH at VL rather than VCC. VCC powers the second stage, but the second stage input isn't driven to the rail, so some ICC current flows. See Figure 21 for details. When enabling from SHDN in RS-232 mode, allow at least 20s for the charge pumps to stabilize before transmitting data. The charge pumps aren't used in RS-485 mode, so the transceiver is ready to send or receive data in less than 1s, which is much faster than competing devices that require the charge pump for all modes of operation.
Small Packages
Many competing dual protocol ICs are available only in monstrously large 24 to 28 Ld SOIC packages. The ISL81334's 28 Ld SSOP is 50% smaller than even a 24 Ld SOIC, and the ISL41334's tiny 6mmx6mm QFN is 80% smaller than a 28 Ld SOIC.
Flow Through Pinouts
Even the ISL81334, ISL41334 pinouts are features, in that the "flow-through" design simplifies board layout. Having the bus pins all on one side of the package for easy routing to a cable connector, and the Rx outputs and Tx inputs on the other side for easy connection to a UART, avoids costly and problematic crossovers. Figure 11 illustrates the flow-through nature of the pinout.
ISL81334
Internal Loopback Mode
Driving the LB pin low places both ports in the loopback mode, a mode that facilitates implementing board level self test functions. In loopback, internal switches disconnect the Rx inputs from the Rx outputs, and feed back the Tx outputs to the appropriate Rx output. This way the data driven at the Tx input appears at the corresponding Rx output (refer to "Typical Operating Circuit" on page 6). The Tx outputs remain connected to their terminals, so the external loads are reflected in the loopback performance. This allows the loopback function to potentially detect some common bus faults such as one or both driver outputs shorted to GND, or outputs shorted together. Note that the loopback mode uses an additional set of receivers, as shown in "Typical Operating Circuit" on page 6. These loopback receivers are not standards compliant, so the loopback mode can't be used to implement a half-duplex RS-485 transceiver. If loopback won't be utilized, the pin can be left disconnected (thanks to the internal pull-up), or it should be connected to VCC (VL for the QFN), through a 1k resistor.
A1 B1 CONNECTOR Y1 Z1 Z2 Y2 B2 A2
R RA1 D DY1 UART OR ASIC OR CONTROLLER
DY2 RA2
FIGURE 11. ILLUSTRATION OF FLOW THROUGH PINOUT
Low Power Shutdown (SHDN) Mode
The ON/OFF pin is driven low to place the IC (both ports) in the SHDN mode, and the already low supply current drops to as low as 25A. If this functionality isn't desired, the pin can be left disconnected (thanks to the internal pull-up), or it should be connected to VCC (VL for the QFN), through a 1k resistor. SHDN disables the Tx and Rx outputs, and disables the charge pumps if either port is in RS-232 mode, so V+ collapses to VCC, and V- collapses to GND.
ISL41334 (QFN Package) Special Features
Logic Supply (VL Pin)
The ISL41334 (QFN) includes a VL pin that powers the logic inputs (Tx inputs and control pins) and Rx outputs. These pins interface with "logic" devices such as UARTs, ASICs, and controllers, and today most of these devices use power supplies significantly lower than 5V. Thus, a 5V output level from a 5V powered dual protocol IC might seriously overdrive and damage the logic device input. Similarly, the
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the logic device's low VOH might not exceed the VIH of a 5V powered dual protocol input. Connecting the VL pin to the power supply of the logic device (as shown in Figure 12) limits the ISL41334's Rx output VOH to VL (see Figure 15), and reduces the Tx and control input switching points to values compatible with the logic device output levels. Tailoring the logic pin input switching points and output levels to the supply voltage of the UART, ASIC, or controller eliminates the need for a level shifter/translator between the two ICs.
VCC = +5V VCC = +2V
RA
VOH = 5V
RXD
ESD DIODE
The VL supply current (IL) is typically less than 100A, as shown in Figures 20 and 21. All of the DC VL current is due to inputs with internal pull-up resistors (DE, SP, LB, ON/OFF) being driven to the low input state. The worst case IL current occurs during SHDN (see Figure 20), due to the IL through the ON/OFF pin pull-up resistor when that pin is driven low. IIL through an input pull-up resistor is ~20A, so the IL in Figure 20 drops by about 40A (at VL = 5V) when the two SP inputs are high (middle vs top curve). IL is lowest in the RS-232 mode, because only the ON/OFF pin should be driven low. When all these inputs are driven high, IL drops to <1A, so to minimize power dissipation drive these inputs high when unneeded (e.g., SP inputs aren't used in RS-232 mode, so drive them high).
Active Low Rx Enable (RXEN)
In many RS-485 applications, especially half duplex configurations, users like to accomplish "echo cancellation" by disabling the corresponding receiver while its driver is transmitting data. This function is available on the QFN package via an active low RXEN pin for each port. The active low function also simplifies direction control, by allowing a single Tx/Rx direction control line. If an active high RXEN were used, either two valuable I/O pins would be used for direction control, or an external inverter is required between DE and RXEN. Figure 13 details the advantage of using the RXEN pin.
+5V ISL81387 VCC + 0.1F
DY GND
VIH 2V VOH 2V
TXD GND
ISL81334 VCC = +5V
UART/PROCESSOR VCC = +2V
VL RA VOH = 2V RXD
ESD DIODE
DY GND
VIH = 0.9V VOH 2V
RA TXD GND Tx/Rx RXEN DEN DY D
R
B A Y Z GND
ISL41334
UART/PROCESSOR ACTIVE HIGH RX ENABLE
FIGURE 12. USING VL PIN TO ADJUST LOGIC LEVELS
VL can be anywhere from VCC down to 1.65V, but the input switching points may not provide enough noise margin when VL < 1.8V. Table 5 indicates typical VIH and VIL values for various VL values so the user can ascertain whether or not a particular VL voltage meets his needs.
TABLE 5. VIH AND VIL vs VL FOR VCC = 5V VL (V) 1.65V 1.8V 2.0V 2.5V 3.3V VIH (V) 0.79 0.82 0.87 0.99 1.19 VIL (V) 0.50 0.60 0.69 0.86 1.05
Tx/Rx
+5V ISL41334 VCC RA RXEN * DE DY D R B A Y Z GND * QFN ONLY ACTIVE LOW RX ENABLE + 0.1F
FIGURE 13. USING ACTIVE LOW vs ACTIVE HIGH RX ENABLE
18
FN6202.3 November 21, 2007
ISL81334, ISL41334
RS-485 Slew Rate Limited Data Rates
The SOIC and SSOP versions of this IC operate with Tx output transitions optimized for a 20Mbps data rate. These fast edges may increase EMI and reflection issues, even though fast transitions aren't required at the lower data rates used by many applications. The ISL41334 (QFN version) solves this problem by offering two additional, slew rate limited, data rates that are optimized for speeds of 115kbps, and 460kbps.The slew limited edges permit longer unterminated networks, or longer stubs off terminated busses, and help minimize EMI and reflections. Nevertheless, for the best jitter performance when driving long cables, the faster speed options may be preferable, even at lower data rates. The faster output transitions deliver less variability (jitter) when loaded with the large capacitance associated with long cables. Figures 43, 44, and 45 detail the jitter performance of the three speed options while driving three different cable lengths. The figures show that under all conditions the faster the edge rate, the better the jitter performance. Of course, faster transitions require more attention to ensuring short stub lengths, and quality terminations, so there are trade-offs to be made. Assuming a jitter budget of 10%, it is likely better to go with the slow speed option for data rates of 115kbps or less, to minimize fast edge effects. Likewise, the medium speed option is a good choice for data rates between 115kbps and 460kbps. For higher data rates, or when the absolute best jitter is required, use the high speed option. Speed selection is via the SPA and SPB pins (see Table 3), and the selection pertains to each port programmed for RS-485 mode.
Evaluation Board
An evaluation board, part number ISL41334EVAL1, is available to assist in assessing the dual protocol IC's performance. The evaluation board contains a QFN packaged device, but because the same die is used in all packages, the board is also useful for evaluating the functionality of the other versions. The board's design allows for evaluation of all standard features, plus the QFN specific features. Refer to the eval board application note for details, and contact your sales rep for ordering information.
Typical Performance Curves
50 RECEIVER OUTPUT CURRENT (mA)
VCC = VL = 5V, TA = +25C; Unless Otherwise Specified.
5 VOL, +25C HIGH OUTPUT VOLTAGE (V)
40 VOL, +85C 30
4
3 IOH = -1mA 2 IOH = -8mA 1 IOH = -4mA
20
VOH, +25C VOH, +85C
10
0
0
1
2
3
4
5
0 0 1 2 VL (V) 3 4 5
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 14. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE
100 DRIVER OUTPUT CURRENT (mA) 90 80 70 60 50 40 30 20 10 0 0 1 2 3 4 DIFFERENTIAL OUTPUT VOLTAGE (V) 5
FIGURE 15. RECEIVER HIGH OUTPUT VOLTAGE vs LOGIC SUPPLY VOLTAGE (VL)
3.6 DIFFERENTIAL OUTPUT VOLTAGE (V) 3.5 RDIFF = 100 3.4 3.3 3.2 3.1 3.0 -40 RDIFF = 54
-25
0
25
50
75
85
TEMPERATURE (C)
FIGURE 16. RS-485, DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT VOLTAGE
FIGURE 17. RS-485, DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs TEMPERATURE
19
FN6202.3 November 21, 2007
ISL81334, ISL41334 Typical Performance Curves
150 4.0 100 OUTPUT CURRENT (mA) Y OR Z = LOW FULL TEMP RANGE 3.5 50 3.0 0 Y OR Z = HIGH +85C +25C ICC (mA) RS-232, RXEN = X
VCC = VL = 5V, TA = +25C; Unless Otherwise Specified. (Continued)
2.5 RS-485, HALF DUPLEX, DE = VCC, RXEN = X 2.0 RS-485, FULL DUPLEX, DE = VCC, RXEN = X
-50
-100 -40C -150 -7 -6 -4 -2 0 2 4 6 OUTPUT VOLTAGE (V) 8 10 12
1.5 RS-485, DE = GND, RXEN = X 1.0 -40 -25 0 25 50 75 85
FIGURE 18. RS-485, DRIVER OUTPUT CURRENT vs SHORT CIRCUIT VOLTAGE
TEMPERATURE (C)
FIGURE 19. SUPPLY CURRENT vs TEMPERATURE
10m NO LOAD VIN = VL or GND LB = VL 1m
600 NO LOAD VIN = VL or GND LB = VL ON = DZ/DE = DY = GND
VL VCC
VL > VCC
500 RS-232/RS-485 ICC 400 ICC AND IL (A)
IL (A)
100
RS-485, DE = ON = SP = GND
300
200
10
RS-232, ON = GND, SP = VL RS-485, DE = ON = GND, SP = VL 100 RS-485 IL 5 6 0 2.0 2.5 3.0 3.5 VL (V) SP = GND SP = VL RS-232 IL 4.0 4.5 5.0
1
2
3
4 VL (V)
FIGURE 20. RS-232, VL SUPPLY CURRENT vs VL VOLTAGE (QFN ONLY)
FIGURE 21. VCC and VL SHDN SUPPLY CURRENTS vs VL VOLTAGE (QFN ONLY)
20
FN6202.3 November 21, 2007
ISL81334, ISL41334 Typical Performance Curves
1700 RDIFF = 54, CL = 100pF 350 1650 PROPAGATION DELAY (ns) 300 1600 tDHL tDLH SKEW (ns) 250 200 150 100 50 |tDLH - tDHL| |tPLHZ - tPHLY| |tPHLZ - tPLHY|
VCC = VL = 5V, TA = +25C; Unless Otherwise Specified. (Continued)
400 RDIFF = 54, CL = 100pF
1550
1500 tDHL 1450
1400 -40
-25
0
25
50
75
85
-40
-25
0
25
50
75
85
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 22. RS-485, DRIVER PROPAGATION DELAY vs TEMPERATURE (SLOW DATA RATE, QFN ONLY)
560 RDIFF = 54, CL = 100pF 550
FIGURE 23. RS-485, DRIVER SKEW vs TEMPERATURE (SLOW DATA RATE, QFN ONLY)
120 RDIFF = 54, CL = 100pF |tPHLZ - tPLHY|
100 PROPAGATION DELAY (ns) 540 530 520 tDHL 510 tDLH 500 490 480 470 -40 tDHL 20 SKEW (ns) 80
60 |tPLHZ - tPHLY| 40
|tDLH - tDHL| -25 0 25 50 75 85 0 -40 -25 0 25 50 75 85
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 24. RS-485, DRIVER PROPAGATION DELAY vs TEMPERATURE (MEDIUM DATA RATE, QFN ONLY)
40
FIGURE 25. RS-485, DRIVER SKEW vs TEMPERATURE (MEDIUM DATA RATE, QFN ONLY)
RDIFF = 54, CL = 100pF
2.5
RDIFF = 54, CL = 100pF
PROPAGATION DELAY (ns)
2.0 35 |tDLH - tDHL| SKEW (ns) tDHL 30 tDLH 25 0.5 |tPHLZ - tPLHY| 0 -40 -25 1.5
1.0 |tPLHZ - tPHLY|
20 -40
-25
0
25
50
75
85
0
25
50
75
85
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 26. RS-485, DRIVER PROPAGATION DELAY vs TEMPERATURE (FAST DATA RATE)
FIGURE 27. RS-485, DRIVER SKEW vs TEMPERATURE (FAST DATA RATE)
21
FN6202.3 November 21, 2007
ISL81334, ISL41334 Typical Performance Curves
RECEIVER OUTPUT (V)
VCC = VL = 5V, TA = +25C; Unless Otherwise Specified. (Continued)
DRIVER INPUT (V) RECEIVER OUTPUT (V) RDIFF = 60, CL = 100pF DY 5 0 DRIVER INPUT (V) DRIVER INPUT (V) DRIVER INPUT (V)
RDIFF = 60, CL = 100pF DY 5 0
5 0
5 0
RA
RA
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
5 4 3 2 1 0 TIME (400ns/DIV) Y Z
5 4 3 2 1 0 TIME (400ns/DIV) Y Z
FIGURE 28. RS-485, DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (SLOW DATA RATE, QFN ONLY)
FIGURE 29. RS-485, DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (SLOW DATA RATE, QFN ONLY)
RECEIVER OUTPUT (V)
DRIVER INPUT (V)
RDIFF = 60, CL = 100pF DY 5 0
RECEIVER OUTPUT (V)
5 0
RDIFF = 60, CL = 100pF DY 5 0
5 0
RA
RA
DRIVER OUTPUT (V)
4 3 2 1 0
DRIVER OUTPUT (V)
5 Y Z
5 4 3 2 1 0 TIME (200ns/DIV) Z
Y
TIME (200ns/DIV)
FIGURE 30. RS-485, DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (MEDIUM DATA RATE, QFN ONLY)
FIGURE 31. RS-485, DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (MEDIUM DATA RATE, QFN ONLY)
RECEIVER OUTPUT (V)
DRIVER INPUT (V)
RDIFF = 60, CL = 100pF DY 5 0
RECEIVER OUTPUT (V)
5 0
RDIFF = 60, CL = 100pF DY 5 0
5 0
RA
RA
DRIVER OUTPUT (V)
4 3 2 1 0
DRIVER OUTPUT (V)
5 Y Z
5 4 3 2 1 0 TIME (10ns/DIV) Y Z
TIME (10ns/DIV)
FIGURE 32. RS-485, DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (FAST DATA RATE)
FIGURE 33. RS-485, DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (FAST DATA RATE)
22
FN6202.3 November 21, 2007
ISL81334, ISL41334 Typical Performance Curves
7.5 TRANSMITTER OUTPUT VOLTAGE (V) 5.0 2.5 ALL TOUTS LOADED WITH 3k TO GND 0 -2.5 -5.0 -7.5 500kbps VOUT+ RS-232 REGION OF NONCOMPLIANCE TRANSMITTER OUTPUT VOLTAGE (V) 250kbps
VCC = VL = 5V, TA = +25C; Unless Otherwise Specified. (Continued)
7.5 5.0 2.5 0 -2.5 -5.0 -7.5 -40 VOUT+
OUTPUTS STATIC ALL TOUTS LOADED WITH 3k TO GND
1 TRANSMITTER/PORT AT 250kbps or 500kbps, OTHER TRANSMITTERS AT 30kbps 500kbps VOUT 250kbps 0 1000 2000 3000 4000 5000
VOUT -25 0 25 50 75 85
LOAD CAPACITANCE (pF)
TEMPERATURE (C)
FIGURE 34. RS-232, TRANSMITTER OUTPUT VOLTAGE vs LOAD CAPACITANCE
FIGURE 35. RS-232, TRANSMITTER OUTPUT VOLTAGE vs TEMPERATURE
40 TRANSMITTER OUTPUT CURRENT (mA) 30 Y or Z = LOW 20 10 VOUT SHORTED TO GND 0 -10 -20 -30 -40 -40 Y or Z = HIGH 0 -25 0 50 25 TEMPERATURE (C) 75 85 0 Y/A -5 5 RA CL = 3500pF, 1 CHANNEL SWITCHING/PORT 5 DY 0 5
2s/DIV
FIGURE 36. RS-232, TRANSMITTER SHORT CIRCUIT CURRENT vs TEMPERATURE
FIGURE 37. RS-232, TRANSMITTER AND RECEIVER WAVEFORMS AT 250kbps
60 CL = 1000pF, 1 CHANNEL SWITCHING/PORT 5 DY 0 5 0 Y/A -5 5 RA 0 RECEIVER + DUTY CYCLE (%) 58
VIN = 5V FULL TEMP RANGE
56
54 SR IN = 15V/s 52 SR IN = 100V/s 50
48 50 1s/DIV. 500 1000 DATA RATE (kbps) 1500 2000
FIGURE 38. RS-232, TRANSMITTER AND RECEIVER WAVEFORMS AT 500kbps
FIGURE 39. RS-232, RECEIVER OUTPUT + DUTY CYCLE vs DATA RATE
23
FN6202.3 November 21, 2007
ISL81334, ISL41334 Typical Performance Curves
1100 1000 900 DATA RATE (kbps) 800 700 600 500 400 300 200 100 100 1000 2000 3000 LOAD CAPACITANCE (pF) 4000 5000 1 TRANSMITTER AT +85C 2 TRANSMITTERS AT +85C 2 TRANSMITTERS AT +25C 1 TRANSMITTER AT +25C
VCC = VL = 5V, TA = +25C; Unless Otherwise Specified. (Continued)
VOUT 4V 7.5 TRANSMITTER OUTPUT VOLTAGE (V) RS-232 REGION OF NONCOMPLIANCE
ALL TOUTS LOADED WITH 5k TO GND
5.0 2.5
VOUT+ +85C
+25C
1 TRANSMITTER SWITCHING ON EACH PORT 0 ALL TOUTS LOADED WITH 5k TO GND, CL = 1000pF -2.5 +85C VOUT -7.5 0 100 200 300 400 500 600 700 800 DATA RATE (kbps) +25C
-5.0
FIGURE 40. RS-232, TRANSMITTER MAXIMUM DATA RATE vs LOAD CAPACITANCE
FIGURE 41. RS-232, TRANSMITTER OUTPUT VOLTAGE vs DATA RATE
450 1 TRANSMITTER SWITCHING ON EACH PORT 400 350 SKEW (ns) +85C 300 250 +25C 200 150 50 JITTER (%) ALL TOUTS LOADED WITH 3k TO GND, CL = 1000pF
100
SLOW 10
MED FAST
1
0.1 150 250 350 450 550 650 750 32 100 200 300 400 DATA RATE (kbps)
DOUBLE TERM'ED WITH 121 500 600 700 800 900 1000
DATA RATE (kbps)
FIGURE 42. RS-232, TRANSMITTER SKEW vs DATA RATE
FIGURE 43. RS-485, TRANSMITTER JITTER vs DATA RATE WITH 2000' CAT-5 CABLE
100 SLOW 10 JITTER (%) FAST JITTER (%) MED
100 SLOW
MED
10
FAST 1
1
0.1 32 100 200 300 400
DOUBLE TERM'ED WITH 121 500 600 700 800 900 1000
0.1 32 100 200 300 400
DOUBLE TERM'ED WITH 121 500 600 700 800 900 1000
DATA RATE (kbps)
DATA RATE (kbps)
FIGURE 44. RS-485, TRANSMITTER JITTER vs DATA RATE WITH 1000' CAT-5 CABLE
FIGURE 45. RS-485, TRANSMITTER JITTER vs DATA RATE WITH 350' CAT-5 CABLE
24
FN6202.3 November 21, 2007
ISL81334, ISL41334 Die Characteristics
SUBSTRATE AND QFN THERMAL PAD POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: 4838 PROCESS: BiCMOS
25
FN6202.3 November 21, 2007
ISL81334, ISL41334
Package Outline Drawing
L40.6x6
40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 3, 10/06
4X 4.5 6.00 A B 6 PIN 1 INDEX AREA 31 30 36X 0.50 40 1 6 PIN #1 INDEX AREA
4 . 10 0 . 15 6.00
21 (4X) 0.15 20 TOP VIEW 40X 0 . 4 0 . 1 BOTTOM VIEW 11
10
0.10 M C A B 4 0 . 23 +0 . 07 / -0 . 05
SEE DETAIL "X" 0.10 C BASE PLANE SIDE VIEW ( 36X 0 . 5 ) SEATING PLANE 0.08 C C
0 . 90 0 . 1 ( 5 . 8 TYP ) ( 4 . 10 )
C ( 40X 0 . 23 ) ( 40X 0 . 6 ) TYPICAL RECOMMENDED LAND PATTERN
0 . 2 REF
5
0 . 00 MIN. 0 . 05 MAX. DETAIL "X"
NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal 0.05 4. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 indentifier may be either a mold or mark feature.
26
FN6202.3 November 21, 2007
ISL81334, ISL41334 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M28.3 (JEDEC MS-013-AE ISSUE C)
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1
L
MILLIMETERS MIN 2.35 0.10 0.33 0.23 17.70 7.40 10.00 0.25 0.40 28 0o MAX 2.65 0.30 0.51 0.32 18.10 7.60 10.65 0.75 1.27 8o NOTES 9 3 4 5 6 7 Rev. 0 12/93
MIN 0.0926 0.0040 0.013 0.0091 0.6969 0.2914 0.394 0.01 0.016 28 0o
MAX 0.1043 0.0118 0.0200 0.0125 0.7125 0.2992 0.419 0.029 0.050 8o
B C D E
A1 0.10(0.004) C
e H h L N
0.05 BSC
1.27 BSC
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
27
FN6202.3 November 21, 2007
ISL81334, ISL41334 Shrink Small Outline Plastic Packages (SSOP)
N INDEX AREA E -B1 2 3 L SEATING PLANE -AD -CA 0.25 0.010 GAUGE PLANE H 0.25(0.010) M BM
M28.209 (JEDEC MO-150-AH ISSUE B)
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 B C D MIN 0.002 0.065 0.009 0.004 0.390 0.197 MAX 0.078 0.072 0.014 0.009 0.413 0.220 MILLIMETERS MIN 0.05 1.65 0.22 0.09 9.90 5.00 MAX 2.00 1.85 0.38 0.25 10.50 5.60 NOTES 9 3 4 6 7 8 Rev. 2 6/05
A1 0.10(0.004) A2 C
E e H L N
e
B 0.25(0.010) M C AM BS
0.026 BSC 0.292 0.022 28 0 8 0.322 0.037
0.65 BSC 7.40 0.55 28 0 8.20 0.95
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "B" does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of "B" dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 28
FN6202.3 November 21, 2007

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